• PS-GTR High Speed Transceivers (upto 6Gbps) x 2
• Gigabit Ethernet x 1 (through On-SOM Gigabit Ethernet PHY)
• USB2.0 OTG x 1 (through On-SOM USB2.0 transceiver)
• RGMII Interface or ULPI Interface x 1
• SD (4bit) x 1
• SPI x 1
• CAN x 2
• Debug UART x 1
• Data UART x 1
• I2C x 2
• PS JTAG

From PL Block

• PL-GTH High Speed Transceivers (upto 16.3Gbps) x 16
• PL IOs – 142 IOs

• • HP Bank IOs – Up to 48 LVDS IOs/96 Single ended (SE)
  • HD Bank IOs – Up to 23 LVDS IOs/46 Single ended (SE)
  • GC Global Clock Input pins – Up to 15 LVDS/SE
  • ADC Input pins – Up to 16 Differential/Single Ended