Description
ZU5/ZU4/ZU3/ZU2 – Zynq Ultrascale+ MPSoC
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Memory Interfaces
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Features from PS
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Features from PL GTH Transceivers*
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Board to Board Connectors
PS Interfaces | SPI x 1 CAN x 2 I2C x 1 UART x 1# |
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PL Interfaces | FPGA IOs from HP Bank – 20LVDS/40SE FPGA IOs from HD Bank – 41LVDS/82SE |
OS Support
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General Features:
Power Input | 12V through Power Jack |
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Operating Temperature | -40°C to +85°C |
Form Factor | 100mm x 72mm |
BSP Support | |
Environment Specification | RoHS & REACH Compliant |
Compliance | CE* |
* PL GTH Transceivers are not supported in ZU3 & ZU2 MPSoC
*Under Progress
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